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AMD Linux

AMD Proposes An FPGA Subsystem User-Space Interface For Linux (phoronix.com) 27

Michael Larabel reports via Phoronix: AMD engineers are proposing an FPGA Subsystem User-Space Interface to overcome current limitations of the Linux kernel's FPGA manager subsystem. AMD-Xilinx engineers are proposing a new sysfs interface for the FPGA subsystem that allows for more user-space control over FPGAs. The suggested interface would handle FPGA configuration, driver probe/remove, bridges, Device Tree Overlay file support for re-programming an FPGA while the operating system is running, and other capabilities for user-space not currently presented by the mainline kernel. [...] This proposal from AMD hopes to standardize the FPGA subsystem user-space interface in a manner that is suitable for upstreaming into the mainline Linux kernel.
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AMD Proposes An FPGA Subsystem User-Space Interface For Linux

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  • Cool (Score:4, Interesting)

    by Anonymous Coward on Thursday January 04, 2024 @05:51PM (#64132805)

    I was waiting for something like this to become mainstream and common. I hope eventually everyday processors (server and pc, not just embedded) will include FPGAs to supplement them for specific high performance tasks.

    • The problem is that FPGAs are completely customisable, and often quite dissimilar even within the same product line, let alone family, let alone across vendors. I can't imagine how you'd create any kind of one-size-fits-all API for them.
      • by Tarlus ( 1000874 )

        At the very least, adding this capability to the kernel will open the door for many-sizes-fit-some APIs. It's a start but who knows how FGPA standards may evolve in the next 5-10 years?

  • by ffkom ( 3519199 ) on Thursday January 04, 2024 @06:17PM (#64132879)
    I read proposals for FPGAs in CPUs time and again over the years, yet I have not noticed any offerings where I can buy an AMD CPU containing a sizable FPGA. I'm all for supporting such in the kernel, but would not waste an hour of work on it until there is actual hardware to use it on.
    • by Anonymous Coward

      I'm all for supporting such in the kernel, but would not waste an hour of work on it until there is actual hardware to use it on.

      AMD Zynq but that's probably not what you had in mind.

      • by ffkom ( 3519199 )

        AMD Zynq but that's probably not what you had in mind.

        Yeah, having only a few slow ARM cores as the conventional part of the CPU is not what I was looking for.

      • Hmm interesting. I wonder how this operates in a Zync environment.

        Generally my Zync projects wouldn't be able to do this since most of my data paths from the CPU are through the FPGA component. So, reprogramming while online would be problematic. It could be interesting to experiment though.
    • by thegarbz ( 1787294 ) on Thursday January 04, 2024 @07:16PM (#64132993)

      By AMD CPU you mean an x86 or current Ryzen? Why would something that powerful need an FPGA? The target market for this is SoCs. There are literally hundreds of CPUs with FPGAs available on the market and they are incredibly popular in countless devices as well.

      If you insist on limiting yourself to AMD, then it's their Zynq or Versal combining ARM Cortex A9 and A72s respectively with FPGAs, the latter even comes with AI co-processors for some of the chips in the series. If you're interesting in Intel it's the Cyclone series you could look at.

      Just because you don't throw a Ryzen at it doesn't mean it's a waste. Linux runs on far more than your desktop.

      • by ffkom ( 3519199 )

        By AMD CPU you mean an x86 or current Ryzen? Why would something that powerful need an FPGA?

        For example to implement new codecs in much more power-efficient way than by using the conventional CPU cores. Or to implement network protocols faster and more power efficient than the CPU cores could do this. Or to implement some digital signal processing that conventional CPU cores are not optimized for.

        • The problem with FPGAs is they are just so darn power in-efficient. And CPU's are already general purpose computing machines. I would wager any such use case would be equal to just adding more CPU cores and implementing in software.

          • Inefficient compared to what? ASICs? Sure. CPUs and GPUs? Nah.

            • Depends on the workload. There are many scenarios in which an FPGA is inefficient compared to a GPU. GPUs provided dedicated hardware for certain mathematical functions. FPGAs don't.

              One thing to note, the FPGAs included in SoCs are incredibly basic. They do not have the performance or capability of a dedicated FPGA. And if you need one of those, buy one. You can get them in PCI-e slot variants, higher end ones with PCI-e Gen5 slots for some really high performance, and even FPGAs on NVME sticks.

              It's all the

              • Which exact "dedicated hardware for certain mathematical functions" are you referring to here?

                There are plenty of situations where video cards have been creatively repurposed for non-graphical use (see: cryptocurrency mining, F@H/PrimeGrid, etc). At least in the case of crypto mining where you're usually hashing away with one specific algorithm (classic example: SHA256), GPUs are vastly less efficient than FPGAs or ASICs. Which is why one does not mine Bitcoin with dGPUs anymore.

                That being said, one also

        • by tigersha ( 151319 ) on Friday January 05, 2024 @12:59AM (#64133497) Homepage

          Apple used to have or still have a PCI card with a FPGA for video encoding. The compressor could reconfigure the FPGA for the Codec used for a specific job.

        • For example to implement new codecs in much more power-efficient way than by using the conventional CPU cores.

          Power-efficiency is something for ARM SoCs. Your use case is literally promoting the current scenarios in which they are already available. But for truly efficient work you want an ASIC or other dedicated hardware, something which CPUs *already have*.

          Or to implement network protocols faster and more power efficient than the CPU cores could do this.

          Again something which is already done, funny enough not just in CPUs, but also in SoCs with FPGAs. Most of these chips will also feature hardware accelerated networking.

  • Will this spec allow for memristor devices?

  • by Dictator For Life ( 8829 ) on Thursday January 04, 2024 @07:11PM (#64132987) Homepage
    Are they asking for direct access to hardware from userland? *Sniff* smells like someone wants to distribute binary blobs. Again. (?)
    • by evanh ( 627108 )

      Probably. :(

      XC6000 series from the 1990s should have suited exactly this but since it was intended as a runtime gate-by-gate editable fabric it never caught on.

    • by AmiMoJo ( 196126 ) on Friday January 05, 2024 @03:59AM (#64133677) Homepage Journal

      Userland is where you want it, because then apps can load their own code. It's kind running tasks on the GPU. It would be pointless if it was fixed function.

    • Are they asking for direct access to hardware from userland? *Sniff* smells like someone wants to distribute binary blobs. Again. (?)

      Why would it smell like that? The question has nothing at all to do with the answer. Whether something is binary or not has no relation to whether it is hardware access from userland.

      You also need hardware access from userland. Or at least enough access to allow the FPGA to be written, otherwise it completely defeats the purpose of the "Field Programmable" part of the Field Programmable Gate Array.

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