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Red Hat Software Hardware

Red Hat Collaborates with SIFive on RISC-V Support, as RHEL 10 Brings AI Assistant and Post-Quantum Security (betanews.com) 14

SiFive was one of the first companies to produce a RISC-V chip. This week they announced a new collaboration with Red Hat "to bring Red Hat Enterprise Linux support to the rapidly growing RISC-V community" and "prepare Red Hat's product portfolio for future intersection with RISC-V server hardware from a diverse set of RISC-V suppliers."

Red Hat Enterprise Linux 10 is available in developer preview on the SiFive HiFive Premier P550 platform, which they call "a proven, high performance RISC-V CPU development platform." The SiFive HiFive Premier P550 provides a proven, high performance RISC-V CPU development platform. Adding support for Red Hat Enterprise Linux 10, the latest version of the world's leading enterprise Linux platform, enables developers to create, optimize, and release new applications for the next generation of enterprise servers and cloud infrastructure on the RISC-V architecture...

SiFive's high performance RISC-V technology is already being used by large organizations to meet compute-intensive AI and machine learning workloads in the datacenter... "With the growing demand for RISC-V, we are pleased to collaborate with SiFive to support Red Hat Enterprise Linux 10 deployments on SiFive HiFive Premier P550," said Ronald Pacheco, senior director of RHEL product and ecosystem strategy, "to further empower developers with the power of the world's leading enterprise Linux platform wherever and however they choose to deploy...."

Dave Altavilla, principal analyst at HotTech Vision And Analysis, said "Native Red Hat Enterprise Linux support on SiFive's HiFive Premier P550 board offers developers a substantial enterprise-grade toolchain for RISC-V.

"This is a pivotal step forward in enabling a full-stack ecosystem around open RISC-V hardware.
SiFive says the move will "inspire the next generation of enterprise workloads and AI applications optimized for RISC-V," while helping their partners "deliver systems with a meaningfully lower total cost of ownership than incumbent platforms."

"With the growing demand for RISC-V, we are pleased to collaborate with SiFive to support Red Hat Enterprise Linux 10 deployments on SiFive HiFive Premier P550..." said Ronald Pacheco, senior director of RHEL product and ecosystem strategy. .

Beta News notes that there's also a new AI-powered assistant in RHEL 10, so "Instead of spending all day searching for answers or poking through documentation, admins can simply ask questions directly from the command line and get real-time help Security is front and center in this release, too. Red Hat is taking a proactive stance with early support for post-quantum cryptography. OpenSSL, GnuTLS, NSS, and OpenSSH now offer quantum-resistant options, setting the stage for better protection as threats evolve. There's a new sudo system role to help with privilege management, and OpenSSH has been bumped to version 9.9. Plus, with new Sequoia tools for OpenPGP, the door is open for even more robust encryption strategies. But it's not just about security and AI. Containers are now at the heart of RHEL 10 thanks to the new "image mode." With this feature, building and maintaining both the OS and your applications gets a lot more streamlined...

Red Hat Collaborates with SIFive on RISC-V Support, as RHEL 10 Brings AI Assistant and Post-Quantum Security

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  • Will this trickle into CentOS? :)

  • High Performance? (Score:4, Interesting)

    by darkain ( 749283 ) on Saturday May 24, 2025 @11:21AM (#65401327) Homepage

    Don't get me wrong, I love the concept of RISC-V. I have that very P550 sitting on my desk right now.

    But calling it a "high performance" platform? The thing trades blows with a Raspberry Pi 4, and is absolutely destroyed by a Raspberry Pi 5.

    Its really really cool to see RISC-V getting more and more love, just like ARM has gotten. But please dont over-sell yourself that much in terms of a particular piece of hardware's capabilities.

    • Re:High Performance? (Score:4, Interesting)

      by karmawarrior ( 311177 ) on Saturday May 24, 2025 @11:32AM (#65401349) Journal

      Yeah, I see RISC V as a potential rival to ARM in the embedded/low power space, but I'm struggling to see the point of it in higher performance areas. It's open source, sure, but it's 1980s CPU technology and an ISA designed to be optimal with 1980s CPU designs. There's a reason most RISC platforms other than ARM and MIPS pretty much disappeared by the early 2000s, and most ARM implementations barely qualify as RISC these days.

      I would love to see someone design a modern compact ISA and some reference designs that's open source in the same way RISC V is, though I suspect the market is much smaller than RISC V's simply because the latter has the benefit you can incorporate it into an embedded SoC, while "Modern V" would have to compete with arm64 et al on an equal footing.

      • * amd64, not arm64 *grumbles*

      • Re:High Performance? (Score:5, Interesting)

        by Misagon ( 1135 ) on Saturday May 24, 2025 @12:20PM (#65401461)

        You got it wrong. RISC-V is a modern, compact ISA. Even without the C extension (which every major chip implements) comparisons have shown that its code is just as compact and inherently capable of high performance as ARM or x86-64.
        RISC-V is not open source but an open standard. There do exist core designs that are open source because the ISA is open, but most processors out there, including those from SiFive are proprietary. They are just not controlled by a single entity who dictates what cores you can and can not build, such as is the case with ARM.

        The technological know-how to create fast RISC-V chips is out there at half a dozen companies, if not twice as many. Many of them are available to license.
        The problem is getting the momentum to get the investment to hire a good fab to get the chips made -- and then bought by consumers.
        And you can't get that momentum overnight. There is inertia to overcome.

        Qualcomm, for instance, is very involved in the development of the RISC-V standard and it is believed that they have cores in their lab that would rival their cores running ARM, only that they have no incentive to develop them for the market right now.
        Other companies, such as MIPS (yes, MIPS) are selling their processor cores first to niche markets, such as automotive.

        • The above is very true. Chinese companies have been doing insane progression on RISC-V architectures and SBCs. I'm seeing boards that are very impressive with performance, even with antediluvian Linux kernels and SoC drivers. I'm seeing SBCs with 32 to 64 gigs of onboard RAM, and 16-32 cores.

          RISC-V has been quietly moving into the market. First on MCUs, but now on SBCs. This was accelerated by the paucity of Raspberry Pi boards for a few years.

          RISC-V is likely going to wind up in the server space prett

      • The big market for chips at the RISC-V level of performance is mobile phones. Those devices require a decent GPU. Once you hook a proprietary GPU to a RISC-V chip, there really is no advantage, economic or technological, over the proven ARM platform. If someone develops and donates a GPU architecture that could do smooth video at 1080p, RISC-V would be able to push their way into some market space in the budget sector.
      • by caseih ( 160668 )

        Just a public service announcement. When people say RISC-V is open source, that does not mean RISC chips are themselves open source, like GPLv3 software would be, for example. All "open source" means in this case is that there's no license fee for the ISA, and the basic specification is freely available and redistribute-able. However all RISC-V chips available on the market today are 100% proprietary and closed source. You can't just download your favorite SBC's core and dump it in an FPGA for your own

      • That sounds like x86 and ARM. x86 is a collection of staggeringly effective bodges one after another, and ARM was designed in the 80s by a cheap arse British company who's main concern was that they couldn't afford fancy expensive ceramic packaging.

        Turned out to not matter all that much anyway. One you stick a massive super scalar out of order unit and a collection of wide floating point multipliers, you've more or less dwarfed any other concerns anyway.

  • The Lost Boys herd of landfills and remote streams. Senator Strum Theremin, anyone? But now that Jony Ive is verifiably E2E B2B... the LOSS2GAIN can oxygenate Neptu-babies!

No amount of careful planning will ever replace dumb luck.

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