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Debian Hardware Hacking Build

Experimental Port of Debian To OpenRISC 56

Via Phoronix comes news that Debian has been ported to the OpenRISC architecture by Christian Svensson. Quoting his mailing list post: "Some people know that I've been working on porting Glibc and doing some toolchain work. My evil master plan was to make a Debian port, and today I'm a happy hacker indeed! ... If anyone want to try this on real hardware (would be very cool to see how this runs IRL), ping me on IRC [#openrisc on freenode] and I'll set you up with instructions how to use debootstrap - just point to a repo with the debs and you're all set, the wonders of binary distributions." For those who don't know, OpenRISC is the completely open source RISC processor intended as the crown jewel of the Opencores project. A working port of glibc and a GNU/Linux distribution is a huge step toward making use of OpenRISC practical. There's a screencast of the system in action, and source on Github (at posting time, it was a month out of date from the looks of it). Christian Svensson's Github account also has repos for the rest of the toolchain.
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Experimental Port of Debian To OpenRISC

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  • OpenRISC hardware? (Score:3, Interesting)

    by Anonymous Coward on Thursday February 27, 2014 @07:31PM (#46363633)

    Without knowing anything about it I'm guessing that or1ksim is a hardware emulator of some kind. What "IRL"hardware can I buy?

    • There is none AFAIK. Unless you count FPGA implementations.

      • Re: (Score:2, Informative)

        by Anonymous Coward

        OpenRISC has been implemented as an ASIC, mainly in embedded systems, so you can't do out an buy an OpenRISC motherboard (yet). Apart from that, your option is to implement it with an FPGA.

    • by Rufty ( 37223 ) on Thursday February 27, 2014 @08:41PM (#46364175) Homepage
      Well, these [opencores.org], but they look more OpenWRT than Debian.
    • You can buy boards with FPGAs that wll run this. Yes, that's not practical for a lot of purposes, however this is a core that can be added into a custom design such as system-on-chip and placed into an ASIC. Presumably smaller headaches than licensing a core from a commercial entity.

    • by nurb432 ( 527695 )

      Without knowing anything

      Well, that is quite clear.

  • nice! (Score:3, Insightful)

    by dmitrygr ( 736758 ) <dmitrygr@gmail.com> on Thursday February 27, 2014 @07:37PM (#46363697) Homepage
    very very cool porting debian userspace to a new arch is a fun exercise
  • How is the chip open source if you need a multi-billion dollar plant to make computer processors of any kind?
    • FPGAs, I assume.

    • by Anonymous Coward

      Use an FPGA?

    • by Anonymous Coward

      How is the chip open source if you need a multi-billion dollar plant to make computer processors of any kind?

      That question doesn't make much more sense than "why does she need glasses if she's deaf?"

      Not having the resources to utilize a work released as open source does not negate its openness. The Linux kernel is still open source (and also free software) if you can't afford a computer capable of compiling or running it.

      Also, as other commenter have noted: FPGAs.

      • Where does one buy or fabricate an open source FPGA? I mean, it isn't TTL that I can use a wire-wrap gun to fabricate. Are the FPGA programming tools open source as well? I am asking, not challenging in this comment because I'd like to obtain said tools. Every FPGA tool that I am aware of is proprietary and closed.

        • Some of FPGA tools are open source, but even some of the commercial proprietary ones do have free versions for students or non-commercial use. These companies do like to get people who are using evaluation boards hooked on their tools.

        • Where does one buy or fabricate an open source FPGA?

          You buy an "empty" FPGA chip and set it to run any digital design (for example, a CPU) that you want to. The hardware description is stored in a little flash chip next to the FPGA, from where it is uploaded to the device when power is turned on.

          Every FPGA tool that I am aware of is proprietary and closed.

          The tools are so closely bound to the hardware and its secrets that the companies do not want to make the tools open source. I do not see how you would benefit them from being open source in this case though. The tools are still freeware and available for Windows and

    • by Anonymous Coward

      It is open source because the hardware design is released under an open source license. Just because manufacturing the processor may not be feasible for average Joe, doesn't mean it's not open source. Maybe what you meant to ask is "What is the point of something being open source, if the average person can't feasibly use that open source design?"

      Potential benefits:
      -Greater competition in the market, more manufactures producing compatible chips compete in the same market place.
      -Cheaper pricing, due to lac

    • by pavon ( 30274 ) on Thursday February 27, 2014 @08:12PM (#46363957)

      You don't need a multi-billion dollar plant to make the processors. You just need to pay someone who does. You can get small quantities of ASICs made for around $2-5k by taking advantage of programs that put many designs from different people on the same wafer.

      • Actually, since this is a CPU that exists only on FPGAs programmed w/ its code, that would be the platform on which it could run while its volumes are low and there is little demand, until such time that the support platforms that it needs, as well as the software is up and out there. You'd only do ASICs once the FPGAs hit economics of scale, and when it's no longer possible to shave costs from the processor when it hits mass production. Given the volume needed to get a fab running - I have no idea how ex

      • by kry73n ( 2742191 )

        You can get small quantities of ASICs made for around $2-5k by taking advantage of programs that put many designs from different people on the same wafer.

        Interesting, can you give me a reference for that? Who does this and where can you apply?

        • by pavon ( 30274 )

          You can now deal directly with TSMC [tsmc.com] for this, or go through third parties like MOSIS [mosis.com] and CMP [cmp.imag.fr]. AFAIK none of the groups that do this publish their rates, and I haven't done this myself, so my numbers come from forums like this one [stackexchange.com], rounding up the lower numbers that I have commonly seen.

    • Point is that since the chip's HDL models are available, w/o any legal restrictions, theoretically, any company w/ a multi-billion dollar fab can take the design, tape and fab it out using those models. In practice, such a company would have to hire its own design, device, process and product engineers to actually produce such a chip. But their designers would essentially have to tweak the designs to the process to meet certain spec parameters, not to build the CPU at gate level from scratch.

      This is sor

      • by Darinbob ( 1142669 ) on Friday February 28, 2014 @12:04AM (#46365193)

        Another good advantage of OpenRISC is that it is open for students to examine and use and experiment with. There are some other CPU designs that are available but they tend to be much smaller or not as full featured.

      • RE Open source chips (Score:5, Informative)

        by olof_k ( 2093198 ) on Friday February 28, 2014 @04:07AM (#46365785)
        Hi, Having worked on the OpenRISC project for ~4 years I thought I could share some insights here, as the licensing question pops up all the time. The RTL for OpenRISC and most of the peripheral controllers that are used are licensed under LGPL, not GPL. While we all know that this is a software license with some concepts that don't translate well to hardware, the consensus is that LGPL means that you are obliged to shared modifications of the LGPL-licensed core, while GPL-licensed RTL would require the whole SoC to be GPL.

        This is a view that we in the OpenRISC community share with the Open Source Hardware developers at CERN and other groups. This has also been tried by IP lawyers for a large company that wanted to use OpenRISC about ten years ago.

        As for ASIC implementations it could be worth mentioning that there are ASICs running or1200 (the original LPGL-licensed OpenRISC implementation) in Samsung Digital TVs, in some of the Allwinner SoCs, Zigbee ASICs and other places, so it has been done many times over the years
    • Open Source means you get to see the contents. That's what it meant before the OSI existed and that's what it will mean when they're gone, and it's what it means now.

      There are plants in China that will make chips for you. Realistically it will take a cooperative of some sort in order to organize the finances and ride herd on the fab to make sure the resulting product is actually useful.

    • How is the chip open source if you need a multi-billion dollar plant to make computer processors of any kind?

      It is implemented in a hardware description language. You can target the logic towards an ASIC OR you can synthesize it into an FPGA. In ASIC-land the development tools cost mega bucks but the nice thing is that the major FPGA vendors provide their tool suites for free with some reduced functionality that is largely inconsequential to hobbyist users.

      You can grab off the shelf FPGAs these days for $5 with sufficient resources to implement a variety microprocessors and whatever custom logic you need. These ca

      • You can grab off the shelf FPGAs these days for $5 with sufficient resources to implement a variety microprocessors

        That are waaay too slow to even boot Debian with a few hours.

        • Re:Here's a question (Score:5, Informative)

          by wiredlogic ( 135348 ) on Thursday February 27, 2014 @09:40PM (#46364575)

          You can easily get a 32-bit processor running at 50-100MHz on current low end parts. Linux runs perfectly well at such speeds. A modern compositing Xorg desktop will likely be bog slow but a console will run just fine. These aren't supposed to be used as general purpose desktop replacements.

          • Yep, usually the core on the FPGA is used as a control system, with the rest of the FPGA dedicated to accelerating a particular set of operations or running them in parallel.

    • "Why would anyone..."

      Because they can and will have had fun doing it in the first place.

    • Include it as a part of your design. Ie, embedded systems in software may be able to use Linux or BSD as the kernel and then have their own user space applications or patches into the kernel. So OpenRISC is the same idea except in hardware. This is relatively common for example with customer system on chip designs: stick in an ARM core, add some standard peripherals you need, and add custom blocks for a particular application. If you've got volume then make an ASIC out of it all and the cost per chip is

    • by nurb432 ( 527695 )

      What has money got to do with its licensing state? Hint: Zero. Also, if you were not just a trolling idiot you would know that a small FPGA board large enough to do a SoC based on OR1k to do this might set you back 200 bucks.

      People these days.

    • by Alioth ( 221270 )

      The chip is open source because you can study the source code (actually it's more akin to Free because you not only can study the source code, but you can redistribute it, modify it etc.)

      Open source has nothing to do with the amount of money you need to spend to build a functional machine out of it.

      In any case as what's already been pointed out, you can synthesise this on an FPGA. FPGA development boards with a suitable sized FPGA (see the Pipistrello) can be had for less than $100.

  • Wow! (Score:1, Funny)

    by Anonymous Coward

    Guys! Look at TFS!
    Really look at it!

    The post... EXPLAINS WHAT OPENRISC IS!

    Is this /.?

    • "lamer" usually does a better job. Maybe because he's new. Or maybe because he's actually an engineer/programmer.

One man's constant is another man's variable. -- A.J. Perlis

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